The semiconductor industry is making significant strides towards achieving the ambitious goal of integrating one trillion transistors on a single chip by 2030. Both Intel and TSMC have publicly shared their visions for achieving this milestone. This goal is driven by the increasing demand for computational power, especially in areas like AI, data centers, and advanced computing applications. The progress towards this target involves not just scaling down transistor size but also innovating in chip architecture, packaging, and materials science.
Intel has been vocal about its plans to reach this trillion-transistor threshold. At various industry conferences and in public statements, Intel has discussed leveraging technologies like Gate-All-Around (GAA) transistors, RibbonFET, Extreme Ultraviolet (EUV) lithography, and advanced 3D stacking to dramatically increase transistor density. Intel’s CEO, Pat Gelsinger, has expressed confidence in scaling up to one trillion transistors by 2030, citing the use of chiplets and advanced packaging technologies as key enablers.
TSMC aims to integrate over 1 trillion transistors through 3D packaging and heterogeneous integration by 2030. They’ve outlined plans for 2nm, 1.4nm, and 1nm process nodes, suggesting that both monolithic designs and multi-chiplet solutions will play crucial roles. TSMC has also emphasized the importance of 3D stacking for increasing transistor counts, with projections for both 3D-packaged chips reaching a trillion transistors and monolithic chips reaching 200 billion.
The actual realization of this goal by 2030 will depend on continued advancements in semiconductor manufacturing processes and the successful integration of new technologies into commercial products.
Advancement in Material Applications have been one of the key element to envision this dream. Ruthenium (Ru) has emerged as a potential replacement for copper in back-end-of-line (BEOL) interconnects due to its electrical characteristics and the possibility of direct etching. This is particularly significant as the traditional copper damascene process faces challenges with scaling beyond the 5nm node due to increased resistance and reliability issues. The subtractive etch process for ruthenium involves depositing a layer of ruthenium and then selectively etching away the unwanted parts to form interconnect lines. This method contrasts with the more common damascene process used with copper, where trenches are etched into the dielectric, filled with metal, and then polished back. The subtractive etch can potentially offer lower resistance at very small dimensions, which is critical at sub-5nm nodes. It also does not require chemical mechanical polishing (CMP), which can be beneficial for cost and complexity. Intel has explored subtractive ruthenium technology, integrating it with air gaps to reduce line-to-line capacitance by up to 25% at pitches less than or equal to 25 nanometers. This involves a process compatible with high-volume manufacturing, aiming to replace copper damascene in tight pitch layers for better interconnect performance and scalability.
The global foundry industry is undergoing significant transformations driven by technological advancements, geopolitical strategies, and market demands. The race towards smaller, more efficient semiconductor nodes continues with companies like TSMC, Samsung, and Intel focusing on 2nm, 1nm, or even below, employing technologies like Gate-All-Around (GAA) and FinFET for better performance and power efficiency. The competition for dominance in these advanced processes is heating up, potentially reshaping market leadership. In light of U.S.-China tensions and supply chain vulnerabilities exposed by the global chip shortage, there’s a push for regionalization or diversification of semiconductor manufacturing. Countries like the U.S., Europe, and Japan are investing heavily in domestic semiconductor industries to reduce dependency on a few key players, particularly Taiwan’s TSMC. Companies are forming partnerships or engaging in acquisitions to strengthen their positions, like GlobalFoundries’ partnerships with STMicroelectronics for expanding production capacity or Intel’s plans to expand its foundry services.
The reshaping of the global foundry industry involves a complex interplay of technology advancement, strategic geopolitical moves, and adapting to market demands for both cutting-edge and mature semiconductor solutions.
The exponential growth in AI, IoT, and automotive industries drives the need for specialized semiconductor solutions, pushing foundries to adapt their offerings to meet these market segments’ unique requirements for performance, power efficiency, and security. The U.S. CHIPS and Science Act, Europe’s investment in semiconductor production, and initiatives in Japan to revive its chip industry have been diversifying and bolstering local manufacturing capabilities, drawing significant investments into the foundry sector.
Russia Ukraine war has been testimony of growing Importance of Semiconductor Sovereignty. It has played a critical role in the Ukraine war not just in direct military applications but also in shaping supply chain strategies and international relations. The conflict has accelerated discussions around semiconductor sovereignty, with nations like the U.S. pushing for policies like the CHIPS Act to bolster domestic production, reduce vulnerabilities, and ensure supply for both civilian and military needs. This reflects a broader trend towards securing critical technology supply chains in light of geopolitical tensions. The war has demonstrated how semiconductor technology can provide a significant advantage on the battlefield, influencing military strategies and outcomes. It also pressures countries to secure their own supply chains or develop domestic capabilities to avoid being cut off from critical technologies during conflicts. The U.S. and its allies have imposed sanctions and export controls on Russia, cutting off direct access to advanced semiconductors.
The Indian semiconductor market is expected to grow significantly, with projections suggesting a market size of billions of USD, driven by demand in sectors like smartphones, automotive, IoT, and 5G technology. Keeping in view, India has also entered the fray for developing home grown Semi-Conductor Industry, with initiatives to build semiconductor hubs, potentially altering the global landscape of foundry services. Government has launched India Semiconductor Mission (ISM), with an outlay of $10 billion, ISM aims to develop a comprehensive semiconductor and display ecosystem. It includes incentives for manufacturing, design, and research. Production Linked Incentive (PLI) Scheme offers financial incentives to companies setting up semiconductor and display manufacturing facilities in India. It’s part of a broader strategy to reduce dependency on imports and foster local production.
Tata Electronics has partnered with Taiwan’s Powerchip Semiconductor Manufacturing Corp (PSMC) to set up India’s first commercial semiconductor fab in Gujarat, focusing on high-performance compute chips and power management chips for various applications. Micron Technology has announced a $2.75 billion investment to build an assembly and test facility in Gujarat, with support from both central and state governments. Companies like CG Power are also the part of overall value chain.
Despite the race for advanced nodes, there’s also a strong demand for mature or legacy nodes for applications where cost and reliability are prioritized over the latest performance metrics. This has kept companies like GlobalFoundries competitive in certain market segments. With time and advancement in Chips, Foundry landscape is set to change in future.
Galctik Views